Volt VMM (Neutron Stardust): source-available under AGPSL v5.0
KVM-based microVMM for the Volt platform: - Sub-second VM boot times - Minimal memory footprint - Landlock LSM + seccomp security - Virtio device support - Custom kernel management Copyright (c) Armored Gates LLC. All rights reserved. Licensed under AGPSL v5.0
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Karl Clinger
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docs/phase3-smp-results.md
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docs/phase3-smp-results.md
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# Volt Phase 3 — SMP Support Results
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**Date:** 2026-03-09
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**Status:** ✅ Complete — All success criteria met
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## Summary
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Implemented Intel MultiProcessor Specification (MPS v1.4) tables for Volt VMM, enabling guest kernels to discover and boot multiple vCPUs. VMs with 1, 2, and 4 vCPUs all boot successfully with the kernel reporting the correct number of processors.
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## What Was Implemented
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### 1. MP Table Construction (`vmm/src/boot/mptable.rs`) — NEW FILE
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Created a complete MP table builder that writes Intel MPS-compliant structures to guest memory at address `0x9FC00` (just below EBDA, a conventional location Linux scans during boot).
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**Table Layout:**
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```
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0x9FC00: MP Floating Pointer Structure (16 bytes)
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- Signature: "_MP_"
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- Pointer to MP Config Table (0x9FC10)
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- Spec revision: 1.4
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- Feature byte 2: IMCR present (0x80)
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- Two's-complement checksum
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0x9FC10: MP Configuration Table Header (44 bytes)
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- Signature: "PCMP"
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- OEM ID: "NOVAFLAR"
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- Product ID: "VOLT VM"
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- Local APIC address: 0xFEE00000
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- Entry count, checksum
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0x9FC3C+: Processor Entries (20 bytes each)
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- CPU 0: APIC ID=0, flags=EN|BP (Bootstrap Processor)
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- CPU 1: APIC ID=1, flags=EN (Application Processor)
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- CPU N: APIC ID=N, flags=EN
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- CPU signature: Family 6, Model 15, Stepping 1
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- Local APIC version: 0x14 (integrated)
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After processors: Bus Entry (8 bytes)
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- Bus ID=0, Type="ISA "
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After bus: I/O APIC Entry (8 bytes)
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- ID=num_cpus (first unused APIC ID)
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- Version: 0x11
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- Address: 0xFEC00000
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After I/O APIC: 16 I/O Interrupt Entries (8 bytes each)
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- IRQ 0: ExtINT → IOAPIC pin 0
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- IRQs 1-15: INT → IOAPIC pins 1-15
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```
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**Total sizes:**
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- 1 CPU: 224 bytes (19 entries)
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- 2 CPUs: 244 bytes (20 entries)
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- 4 CPUs: 284 bytes (22 entries)
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All fit comfortably in the 1024-byte space between 0x9FC00 and 0xA0000.
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### 2. Boot Module Integration (`vmm/src/boot/mod.rs`)
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- Registered `mptable` module
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- Exported `setup_mptable` function
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### 3. Main VMM Integration (`vmm/src/main.rs`)
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- Added `setup_mptable()` call in `load_kernel()` after `BootLoader::setup()` completes
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- MP tables are written to guest memory before vCPU creation
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- Works for any vCPU count (1-255)
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### 4. CPUID Topology Updates (`vmm/src/kvm/cpuid.rs`)
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- **Leaf 0x1 (Feature Info):** HTT bit (EDX bit 28) is now enabled when vcpu_count > 1, telling the kernel to parse APIC topology
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- **Leaf 0x1 EBX:** Initial APIC ID set per-vCPU, logical processor count set to vcpu_count
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- **Leaf 0xB (Extended Topology):** Properly reports SMT and Core topology levels:
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- Subleaf 0 (SMT): 1 thread per core, level type = SMT
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- Subleaf 1 (Core): N cores per package, level type = Core, correct bit shift for APIC ID
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- Subleaf 2+: Invalid (terminates enumeration)
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- **Leaf 0x4 (Cache Topology):** Reports correct max cores per package
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## Test Results
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### Build
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```
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✅ cargo build --release — 0 errors, 0 warnings
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✅ cargo test --lib boot::mptable — 11/11 tests passed
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```
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### VM Boot Tests
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| Test | vCPUs | Kernel Reports | Status |
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|------|-------|---------------|--------|
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| 1 CPU | `--cpus 1` | `Processors: 1`, `nr_cpu_ids:1` | ✅ Pass |
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| 2 CPUs | `--cpus 2` | `Processors: 2`, `Brought up 1 node, 2 CPUs` | ✅ Pass |
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| 4 CPUs | `--cpus 4` | `Processors: 4`, `Brought up 1 node, 4 CPUs`, `Total of 4 processors activated` | ✅ Pass |
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### Key Kernel Log Lines (4 CPU test)
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```
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found SMP MP-table at [mem 0x0009fc00-0x0009fc0f]
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Intel MultiProcessor Specification v1.4
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MPTABLE: OEM ID: NOVAFLAR
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MPTABLE: Product ID: VOLT VM
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MPTABLE: APIC at: 0xFEE00000
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Processor #0 (Bootup-CPU)
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Processor #1
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Processor #2
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Processor #3
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IOAPIC[0]: apic_id 4, version 17, address 0xfec00000, GSI 0-23
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Processors: 4
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smpboot: Allowing 4 CPUs, 0 hotplug CPUs
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...
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smp: Bringing up secondary CPUs ...
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x86: Booting SMP configuration:
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.... node #0, CPUs: #1
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smp: Brought up 1 node, 4 CPUs
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smpboot: Total of 4 processors activated (19154.99 BogoMIPS)
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```
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## Unit Tests
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11 tests in `vmm/src/boot/mptable.rs`:
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| Test | Description |
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|------|-------------|
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| `test_checksum` | Verifies two's-complement checksum arithmetic |
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| `test_mp_floating_pointer_signature` | Checks "_MP_" signature at correct address |
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| `test_mp_floating_pointer_checksum` | Validates FP structure checksum = 0 |
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| `test_mp_config_table_checksum` | Validates config table checksum = 0 |
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| `test_mp_config_table_signature` | Checks "PCMP" signature |
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| `test_mp_table_1_cpu` | 1 CPU: 19 entries (1 proc + bus + IOAPIC + 16 IRQs) |
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| `test_mp_table_4_cpus` | 4 CPUs: 22 entries |
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| `test_mp_table_bsp_flag` | CPU 0 has BSP+EN flags, CPU 1 has EN only |
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| `test_mp_table_ioapic` | IOAPIC ID and address are correct |
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| `test_mp_table_zero_cpus_error` | 0 CPUs correctly returns error |
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| `test_mp_table_local_apic_addr` | Local APIC address = 0xFEE00000 |
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## Files Modified
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| File | Change |
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|------|--------|
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| `vmm/src/boot/mptable.rs` | **NEW** — MP table construction (340 lines) |
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| `vmm/src/boot/mod.rs` | Added `mptable` module and `setup_mptable` export |
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| `vmm/src/main.rs` | Added `setup_mptable()` call after boot loader setup |
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| `vmm/src/kvm/cpuid.rs` | Fixed HTT bit, enhanced leaf 0xB topology reporting |
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## Architecture Notes
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### Why MP Tables (not ACPI MADT)?
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MP tables are simpler (Intel MPS v1.4 is ~400 bytes of structures) and universally supported by Linux kernels from 2.6 onwards. ACPI MADT would require implementing RSDP, RSDT/XSDT, and MADT — significantly more complexity for no benefit with the kernel versions we target.
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The 4.14 kernel used in testing immediately found and parsed the MP tables:
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```
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found SMP MP-table at [mem 0x0009fc00-0x0009fc0f]
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```
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### Integration Point
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MP tables are written in `Vmm::load_kernel()` immediately after `BootLoader::setup()` completes. This ensures:
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1. Guest memory is already allocated and mapped
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2. E820 memory map is already configured (including EBDA reservation at 0x9FC00)
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3. The MP table address doesn't conflict with page tables (0x1000-0xA000) or boot params (0x20000+)
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### CPUID Topology
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The HTT bit in CPUID leaf 0x1 EDX is critical — without it, some kernels skip AP startup entirely because they believe the system is uniprocessor regardless of MP table content. We now enable it for multi-vCPU VMs.
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## Future Work
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- **ACPI MADT:** For newer kernels (5.x+) that prefer ACPI, add RSDP/RSDT/MADT tables
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- **CPU hotplug:** MP tables are static; ACPI would enable runtime CPU add/remove
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- **NUMA topology:** For large VMs, SRAT/SLIT tables could improve memory locality
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